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Hands on session on Digital Design with Verilog HDL and FPGA

Hands on session on Digital Design with Verilog HDL and FPGA will be conducted by the Reconfigurable Digital System Research Group of University of Moratuwa for all undergraduates of the department of Electronic and Telecommunication Engineering. The workshop will be held on 12th February 2013 from 9.00am to 5.00pm at the department. Workshop is mainly targeted for the students from semester-2 and semester-4 who are new for the digital design concept; however any ENTC student who is interested can participate in the workshop.

Workshop content will be as follows.

Session on Xilinx FPGAs

  • Introduction to Verilog Hardware Description Language.
  • Language Basics
  • Designing for different levels of abstraction
  • Using Xilinx ISE design environment for HDL code development
  • Schematic based approach for digital system design
  • Xilinx's design Hierarchy
  • Simulation with ISIM
  • FPGA configuration with USB-JTAG
  • Using Xilinx CORE Generator for design acceleration

Session on Altera FPGAs

  • HDL code and schematic approach for designing
  • Simulation with Altera ModelSim
  • FPGA configuration with USB-JTAG
  • Using Altera Megafunction for design acceleration

Those who are interested in attending  the workshop please verify your presence providing following details to This email address is being protected from spambots. You need JavaScript enabled to view it.">This email address is being protected from spambots. You need JavaScript enabled to view it. on or before Sunday 10th of February 4.00pm.

  • Your name with Initials
  • Index No
  • NIC number
  • Whether you are having a personal FPGA (if so the model)

Participants are requested to bring your own laptops and the workshop will be conducted using Windows environment based software.